Architectural Support for the Stream Execution Model on General-Purpose Processors

Jayanth Gummaraju1,  Mattan Erez2,  Joel Coburn3,  Mendel Rosenblum1,  William Dally1
1Stanford University, 2Univ. of Texas, Austin, 3Xilinx Inc.


There has recently been much interest in stream processing, both in industry (e.g., Cell, NVIDIA G80, ATI R580) and academia (e.g., Stanford Merrimac, MIT RAW), with stream programs becoming increasingly popular for both media and more general-purpose computing. Although a special style of programming called stream programming is needed to target these stream architectures, huge performance benefits can be achieved. It has been noted that stream programming can make efficient use of commodity multicore processors (e.g, Intel/AMD) with multiple companies offering tools that use stream programming on such processors.

In this paper, we minimally add architectural features to general-purpose processor cores to efficiently support the stream execution model. We design the extensions to reuse existing components of the general-purpose processor hardware as much as possible by investigating low-cost modifications to the CPU caches, hardware prefetcher, and the execution core. With a less than 1% increase in die area along with judicious use of a software runtime system, we can efficiently support stream programming on traditional processor cores. We evaluate our techniques by running scientific applications on a cycle-level simulation system. The results show that our system executes stream programs as efficiently as possible, limited only by the ALU performance and the memory bandwidth needed to feed the ALUs.